This invention relates to a data-processing device, and, more particularly, to a data-processing device capable of accepting, for example, AIM (AND Immediate Data) instructions.
In general, an arithmetic-logic unit (ALU) in a central processing unit (CPU) performs the following operations during the execution of various instructions:
an arithmetic-logic operation designated by each instruction;
an operation for the changing of flags; and
an operation for addressing.
During the cycles in which no operations are executed, i.e., during the idle cycles, meaningless or invalid data exists in the ALU.
In developing CPUs, one of the key problems is how to realize instructions that can be executed with the minimum number of execution cycles and the highest efficiency, using the limited hardware of internal buses and registers. As matters stand, the effective execution of instructions cannot easily be realized without additional hardware such as temporary registers and internal buses.
A method for executing the index mode of an AIM (AND Immediate Data) instruction will now be described. This instruction makes a logical product of the contents of a RAM and immediate data and stores the logical product in the RAM.
More specifically, the AIM instruction is a composite instruction made up of the following three functions:
(1) storing the RAM data in an accumulator;
(2) making the logical product of the data in the accumulator and the immediate data, and storing the logical product in the accumulator; and
(3) storing the accumulator data in the RAM.
Ordinarily, the instruction of the index mode has a format of two bytes, in which the first byte contains an operation code and the second byte contains index offset data.
The AIM instruction, however, is formed of three bytes, in which the one additional byte is for the operand of the immediate data. To execute this instruction at high speed, numerous registers are required. When the executing hardware has a limited number of registers it is very difficult to speed up the execution of the instruction while maintaining a satisfactory level of the practicability of the data-processing device.